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[CLEAR] sse3 and athlon64

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janiskr
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[CLEAR] sse3 and athlon64

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Post by janiskr » Thu Dec 22, 2005 10:24 pm

so i have venice core with E3 revision, that means i do have sse3 command set iz there anything i can put in use those?

but cat /proc/cpuinfo says that i do not have that, so what can be dome about that?
Last edited by janiskr on Fri Dec 23, 2005 12:14 pm, edited 1 time in total.
umm... amd64 then...
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drwook
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Post by drwook » Thu Dec 22, 2005 11:32 pm

sse3 comes up in /proc/cpuinfo as 'pni' I believe.

If you have it, you can add '-msse3' to your CFLAGS in your make.conf. Can't think of any disadvantage to doing this, but haven't really researched as I've got an 'old' s754 athlon 64 which doesn't support sse3...
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CptnObvious999
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Post by CptnObvious999 » Fri Dec 23, 2005 12:08 am

drwook wrote:sse3 comes up in /proc/cpuinfo as 'pni' I believe.

If you have it, you can add '-msse3' to your CFLAGS in your make.conf. Can't think of any disadvantage to doing this, but haven't really researched as I've got an 'old' s754 athlon 64 which doesn't support sse3...
Just wondering when you add -msse3 do you need -msse2 and -msse? or does assume those are on with the -msse3?
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mark_alec
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Post by mark_alec » Fri Dec 23, 2005 12:54 am

CptnObvious999 wrote:Just wondering when you add -msse3 do you need -msse2 and -msse? or does assume those are on with the -msse3?
You do not need to add -msse and -msse2 because those are implied by -march=k8
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CptnObvious999
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Post by CptnObvious999 » Fri Dec 23, 2005 12:58 am

mark_alec wrote:
CptnObvious999 wrote:Just wondering when you add -msse3 do you need -msse2 and -msse? or does assume those are on with the -msse3?
You do not need to add -msse and -msse2 because those are implied by -march=k8
Awesome thanks
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janiskr
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Post by janiskr » Fri Dec 23, 2005 10:58 am

but not all Athlon64 processors has these sse3 insructions, even not all sandiego cores has sse3
so, does realy -march=k8 has sse3 enabled?

Code: Select all

man gcc:

-mtune=cpu-type
Tune to cpu-type everything applicable about the generated code, except for the ABI and the set of available instructions. The choices for cpu-type are:
[...]
k8, opteron, athlon64, athlon-fx
AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
[...] 
umm... amd64 then...
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nxsty
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Post by nxsty » Fri Dec 23, 2005 11:32 am

janiskr wrote:but not all Athlon64 processors has these sse3 insructions, even not all sandiego cores has sse3
so, does realy -march=k8 has sse3 enabled?
No, the only flag enabled by -march=k8 is actually -m3dnow. The other flags -mmmx -msse -msse2 and -mfpmath=sse is on by default on x86_64 with or without -march. -msse3 is the only one you have to add explicitly.
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janiskr
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[CLEARED] sse3 and athlon64

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Post by janiskr » Fri Dec 23, 2005 12:14 pm

thanks, no i got this idea clear.
Results: just as i suspected sse3 is not used if no additional falgs are used

since im at work and cannot turn on my gentoo box at home i could not get man gcc :( anc chek does it have or not

thx everyone for replies.

going to bring my PC a sse3 instructon set for Xmas :D

viva la recompile :D
umm... amd64 then...
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deepspace9
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Post by deepspace9 » Fri Dec 23, 2005 12:59 pm

The big question is: will it bring any performance improvements? Does anyone have any benchmark already?
Athlon 64 X2 3800+
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Corona688
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Post by Corona688 » Fri Dec 23, 2005 7:33 pm

Is it safe yet to use SSE instruction set extensions? I keep hearing about some danger about SSE registers and context switches, but it's not altogether clear what this is.
Petition for Better 64-bit ATI Drivers - Sign Here
http://www.petitiononline.com/atipet/petition.html
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widan
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Post by widan » Fri Dec 23, 2005 8:19 pm

Corona688 wrote:Is it safe yet to use SSE instruction set extensions? I keep hearing about some danger about SSE registers and context switches, but it's not altogether clear what this is.
The kernel saves and restores the floating point context (including SSE-specific registers) during a context switch, so there should not be any problems. What is forbidden is using SSE (or any floating point for that matter) from within the kernel (in a driver for example), as it can corrupt userspace FP context in some cases.
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