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lightvhawk0 Guru
Joined: 07 Nov 2003 Posts: 388
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Posted: Wed Apr 28, 2010 7:24 am Post subject: |
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Mine are pretty simple
-march=native -O2 -msse4.1-pipe
Code: | -O2 turns on all optimization flags specified by -O. It also turns
on the following optimization flags: -fthread-jumps
-falign-functions -falign-jumps -falign-loops -falign-labels
-fcaller-saves -fcrossjumping -fcse-follow-jumps -fcse-skip-blocks
-fdelete-null-pointer-checks -fexpensive-optimizations -fgcse
-fgcse-lm -findirect-inlining -foptimize-sibling-calls -fpeephole2
-fregmove -freorder-blocks -freorder-functions
-frerun-cse-after-loop -fsched-interblock -fsched-spec
-fschedule-insns -fschedule-insns2 -fstrict-aliasing
-fstrict-overflow -ftree-switch-conversion -ftree-pre -ftree-vrp
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I think all of these opts are good enough for me...
Wow I did a test to see what march=native outputted for me and..
Code: | -march=core2 -mcx16 -msahf -msse4.1 --param l1-cache-size=32 --param l1-cache-line-size=64 --param l2-cache-size=3072 -mtune=core2 | are my results! _________________ If God has made us in his image, we have returned him the favor. - Voltaire |
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HeXiLeD Veteran
Joined: 20 Aug 2005 Posts: 1159 Location: Online
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Posted: Wed Apr 28, 2010 8:57 am Post subject: |
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5 years with EMT intel cpu (xeon flags) 64 bit:
Code: | CFLAGS="-march=nocona -O2 -mtune=nocona -fforce-addr -ftracer -mmmx -msse3 -mfpmath=sse -pipe" |
For the following 2 core cpu:
Code: | processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Pentium(R) 4 CPU 3.20GHz
stepping : 3
cpu MHz : 3203.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc pebs bts pni dtes64 monitor ds_cpl est cid cx16 xtpr
bogomips : 6401.10
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management: |
It's a multilib system and i don't run ~packages and the system is rock solid with very very good performance.
But if there is something that can be even more tunned up; i am all hears/eyes _________________ Do you hear the sound of inevitability?
With age, comes great grumpiness and that, was 20 years ago...
CertFP: becbbd161d5a5c31de3c45171b77bf710911db29 / d985d21f89fe2977b593c4d381a1a86802e62990d9328d893db76d59f9935244 |
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kreaukmeaus n00b
Joined: 26 Mar 2010 Posts: 33
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Posted: Wed Apr 28, 2010 2:44 pm Post subject: |
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Intel Core 2 duo t9300:
Code: |
CFLAGS="-march=core2 -msse -msse2 -msse3 -mssse3 -msse4.1 -mfpmath=sse -O2 -pipe"
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cat /proc/cpuinfo:
Code: |
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 23
model name : Intel(R) Core(TM)2 Duo CPU T9300 @ 2.50GHz
stepping : 6
cpu MHz : 2493.622
cache size : 6144 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm ida tpr_shadow vnmi flexpriority
bogomips : 4987.24
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
This is printed twice with different id's.
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Do not take my useflag too serious cause I'm just a newbie.
Feel free to give me some tips or hints. I would be grateful.
Maybe you guys knows some good sites to learn about them. |
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tomk Bodhisattva
Joined: 23 Sep 2003 Posts: 7221 Location: Sat in front of my computer
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Neskweek n00b
Joined: 20 Jun 2004 Posts: 35 Location: Nantes - France
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Posted: Fri Jul 23, 2010 10:25 am Post subject: |
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Hi
I'm actually trying to compile a whole system with those using gcc 4.4.3 :
Code: |
CFLAGS="-march=native -O2 -pipe -frecord-gcc-switches -ftree-loop-linear -floop-block -floop-interchange -floop-strip-mine -fgraphite-identity -finline-functions -fira-algorithm=CB -fira-region=mixed -ftree-loop-distribution -ftree-parallelize-loops=2 -mfpmath=both -ftree-loop-ivcanon -ftree-loop-im -ftracer -freorder-blocks-and-partition"
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CPU :
cpu family : 15
model : 107
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 4800+
Well when I say a whole system I'm lying
I'm at this time I did give up, on a per ebuild bases, some of them :
- because some of them break compilation
- because some of them introduces some nice bugs
But at this moment only a few ebuild required to remove some flags. and here are the flags commonly removed on those ebuilds:
-ftree-parallelize-loops=2. Some ebuilds doesn't seem to rely on pthreads so they don't like that flag
-floop-block -floop-interchange -floop-strip-mine -fgraphite-identity : the graphite package. Well for now on I removed that for a very few ebuilds on the @system pack (I'm not yet playing with the @world ones)
SOmething interesting is that two ebuild (don't remember wich one but I could give you their names later) required to be compiled with -fPIC using those flags |
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davidogg n00b
Joined: 07 Sep 2003 Posts: 9
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Posted: Mon Aug 16, 2010 10:27 pm Post subject: |
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codergeek42 wrote: | You don't need to add those though. The proper MMX/SSE/3DNow! options are implied by your "-march=" setting. |
I'm wondering about this, because on my system;
gcc -Q --help=target -march=k8-sse3
doesn't show many of the flags being turned on.
gcc -Q --help=target -march=native
doesn't turn many on either, and returns the same as;
gcc -Q --help=target -march=mybrain
leaving me wondering if "native" does anything at all. |
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kernelOfTruth Watchman
Joined: 20 Dec 2005 Posts: 6111 Location: Vienna, Austria; Germany; hello world :)
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Posted: Mon Aug 16, 2010 10:55 pm Post subject: |
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davidogg wrote: | codergeek42 wrote: | You don't need to add those though. The proper MMX/SSE/3DNow! options are implied by your "-march=" setting. |
I'm wondering about this, because on my system;
gcc -Q --help=target -march=k8-sse3
doesn't show many of the flags being turned on.
gcc -Q --help=target -march=native
doesn't turn many on either, and returns the same as;
gcc -Q --help=target -march=mybrain
leaving me wondering if "native" does anything at all. |
then it might be a gcc-bug you discovered
it was the same in the recent past with gcc 4.5.0 and intel core i7 mistakenly being set as atom _________________ https://github.com/kernelOfTruth/ZFS-for-SystemRescueCD/tree/ZFS-for-SysRescCD-4.9.0
https://github.com/kernelOfTruth/pulseaudio-equalizer-ladspa
Hardcore Gentoo Linux user since 2004 |
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davidogg n00b
Joined: 07 Sep 2003 Posts: 9
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Posted: Tue Aug 17, 2010 3:11 am Post subject: |
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kernelOfTruth wrote: | davidogg wrote: | codergeek42 wrote: | You don't need to add those though. The proper MMX/SSE/3DNow! options are implied by your "-march=" setting. |
I'm wondering about this, because on my system;
gcc -Q --help=target -march=k8-sse3
doesn't show many of the flags being turned on.
gcc -Q --help=target -march=native
doesn't turn many on either, and returns the same as;
gcc -Q --help=target -march=mybrain
leaving me wondering if "native" does anything at all. |
then it might be a gcc-bug you discovered
it was the same in the recent past with gcc 4.5.0 and intel core i7 mistakenly being set as atom |
gcc --version
gcc (Gentoo 4.4.3-r2 p1.2) 4.4.3
I'm still in a chroot installing |
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