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Dlareh
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PostPosted: Wed Sep 14, 2005 1:28 pm    Post subject: New Microcode for Intel CPUs. Reply with quote

For those of you that don't follow http://planet.gentoo.org , Intel recently released new CPU microcode and r3pek blogged a mini-howto :

If you want to update CPU's microcode just do this:
Code:
emerge microcode-ctl
rc-update add microcode_ctl boot
wget http://urbanmyth.org/microcode/ucode/intel-ia32microcode-29Aug2005.txt.bz2
bunzip2 intel-ia32microcode-29Aug2005.txt.bz2
cp intel-ia32microcode-29Aug2005.txt /etc/microcode.dat
/etc/init.d/microcode_ctl start

After this simple steps, your should be ready to go with the new microcode. Don't forget that to be able to update your microcode you have to have that option enabled on the kernel:
Code:
 -> Processor type and features
 /dev/cpu/microcode - Intel IA32 CPU microcode support

Also, the new microcode that is uploaded to the CPU, doesn't get "saved", that's why you have to add microcode_ctl as a service, so it can upload the microcode to the CPU every boot.
To confirm that everything went fine after run the init script run this command:
Code:
dmesg | tail

If you have something like this in the result everything is fine and you have the new microcode running:
Code:
microcode: CPU0 updated from revision 0x17 to 0x18, date = 10172004


... and I got this on my pentium-m 1200mhz :
Code:
microcode: CPU0 updated from revision 0x5 to 0x7, date = 11092004

Post yours, if you would... I'm idly curious.
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dpetka2001
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PostPosted: Wed Sep 14, 2005 2:44 pm    Post subject: Reply with quote

so from the mini-howto I've read that microcode is something like a firmware for the CPU...though there isn't any changelog so we have to use it on our own risk...did you notice any improvement with your CPU?? could you share with us your observations overall if any?? thanks in advance...
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Jeremy_Z
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PostPosted: Wed Sep 14, 2005 5:25 pm    Post subject: Reply with quote

Yes, is there any use of doing that ? Well i guess the update has a reason, too bad it is not mentioned.
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PostPosted: Wed Sep 14, 2005 5:50 pm    Post subject: Reply with quote

Jeremy_Z wrote:
Yes, is there any use of doing that ? Well i guess the update has a reason, too bad it is not mentioned.

Maybe it secretly adds DRM? Who knows...;)
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a2gentoo
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PostPosted: Wed Sep 14, 2005 5:55 pm    Post subject: sounds interesting.. but.. Reply with quote

This sounds like a neat idea. But....

What is in it for me?
Does it improve performance, power management? Make the kernel more stable?

Also. How is the firmware needed to be reloaded EVERY reboot. The old frimware doesnt. Something sounds odd.


Not that I am against this whole idea. I just dont understand "what is in it for me".
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Jeremy_Z
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PostPosted: Thu Sep 15, 2005 1:03 am    Post subject: Reply with quote

The "old" one is there already so not need to load it i suppose.
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NewBlackDak
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PostPosted: Thu Sep 15, 2005 3:19 am    Post subject: Reply with quote

CPU microcode isn't flash updateable, so you have to load it with software.
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PostPosted: Thu Sep 15, 2005 7:35 pm    Post subject: Reply with quote

I'm going to try it tonight.

Has anyone else tried this yet? Did it improve anything or make any difference?

I have a Acer Aspire 1414WLCi notebook. It's a Pentium Celeron M (1.3GHz).

I'll followup with my results.

Here's my cpuinfo currently:

Code:
fortune ~ # cat /proc/cpuinfo
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 13
model name      : Intel(R) Celeron(R) M processor         1.30GHz
stepping        : 8
cpu MHz         : 1298.952
cache size      : 1024 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss tm pbe nx
bogomips        : 2564.09
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ripper2256
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PostPosted: Thu Sep 15, 2005 10:38 pm    Post subject: Reply with quote

Quote:
Does it improve performance, power management? Make the kernel more stable?

That's hard to tell, 'cause intel released no changelog :(
To quote Carlos Silvia:
Quote:
a microcode update doesn't mean more performance, so don't yell at me because of this, I'm just a messenger ;)

But I will try and see if something cool happens ;)
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pijalu
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PostPosted: Fri Sep 16, 2005 2:51 am    Post subject: Re: New Microcode for Intel CPUs. Reply with quote

seems old news here
Code:

microcode: CPU0 already at revision 0x20 (current=0x20)
microcode: No new microcode data for CPU0

8)
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roderick
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PostPosted: Fri Sep 16, 2005 4:04 pm    Post subject: Reply with quote

Ok,

Here's what I get after installing and updating the .dat file:

Code:
Sep 16 13:24:34 fortune IA-32 Microcode Update Driver: v1.14 <tigran@veritas.com>
Sep 16 13:24:34 fortune microcode: CPU0 updated from revision 0x0 to 0x20, date = 07222004


So, I got a major revision bump. Not sure how this will impact me.

I'll see if I notice any difference in performance.

Here's my new cpuinfo:

Code:
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 13
model name      : Intel(R) Celeron(R) M processor         1.30GHz
stepping        : 8
cpu MHz         : 1299.397
cache size      : 1024 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca c     mov pat clflush dts acpi mmx fxsr sse sse2 ss tm pbe nx
bogomips        : 2564.09


Some differences.

This line changed: cpu MHz : 1299.397
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hans0r
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PostPosted: Fri Sep 16, 2005 4:31 pm    Post subject: Reply with quote

Code:
 microcode: CPU0 updated from revision 0x5 to 0x7, date = 11092004


Code:

processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 9
model name      : Intel(R) Pentium(R) M processor 1500MHz
stepping        : 5
cpu MHz         : 600.111
cache size      : 1024 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 tm pbe est tm2
bogomips        : 1201.83


no noticeable changes so far
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roderick
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PostPosted: Fri Sep 16, 2005 4:49 pm    Post subject: Reply with quote

Yeah, my cpuinfo changed back to the 1298 from 1299. Must be a slight variation in clock speed of CPU, so the microcode had no impact on that specifically.

Didn't seem to break anything. Haven't noticed any other differences.

Gee, wish intel would of published something of a change log.
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pijalu
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PostPosted: Fri Sep 16, 2005 4:55 pm    Post subject: Reply with quote

roderick wrote:
...
Gee, wish intel would of published something of a change log.


Like: Fixed all these undocumented bugs ? don't think they will :lol:
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ripper2256
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PostPosted: Fri Sep 16, 2005 11:28 pm    Post subject: Reply with quote

Code:
microcode: CPU0 updated from revision 0x5 to 0x7, date = 11092004

Hmm, everything works fine so far... I don't notice any difference...
Well, at leasts, it's kind of cool, to update the microcode of your own cpu... Yeah, ok, to be honest, I think this was a waste of time, the only thing i learnd here, is what a microcode is and what it is for.
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ehatherley
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PostPosted: Sat Sep 17, 2005 4:54 am    Post subject: Reply with quote

Here's the line from an article written for linux-mag.com by one of the authors of the driver:

Quote:
The Linux Microcode Update Driver
Gearheads

Written by Tigran Aivazian
Thursday, 15 February 2001

Some of the recent Intel microprocessors have the capability of correcting specific hardware bugs by loading a sequence of bits called a "microcode update" into the CPU. This feature is available on all processors in the Intel P6 family, including Pentium Pro, Celeron, Pentium II, Pentium III, Pentium II Xeon, Pentium III Xeon, and the newly released Pentium 4. This feature is applicable to both single-processor and multi-processor (SMP) systems.

The loading of a microcode update is usually delegated to the BIOS but can also be performed by the operating system without needing to run in a special mode or reboot after the update is done. It is also possible (and quite common) to have the BIOS apply a microcode update to some revision level and later have the OS upgrade it to a newer revision.

The support for microcode update for the P6 family processors was added to the Linux kernel in February 2000 as of version 2.3.46. Support for the Pentium 4 microcode updates was added to Linux 2.4.0-test12 in December of the same year.


Presumably there is something in the official Intel literature as well, since it is referenced at the end of the article. Browsing around the Intel website turns up Intel® Pentium® 4 Processor Technical Documents. If you look at the "Specification Update" document, it has a whole table of things that "don't work as expected"; some software, some hardware. Some are 'fixed' others will never be fixed, presumably because they don't expect it to cause problems. Most of the 'bugs' are way out on the fringes where most code will never go.

To me it looks like these 'microcode updates' are not performance related but rather fixes for weird bugs. And I suspect that the microcode update files get bigger mostly because Intel brings out new processors. Notice that the update is a 'one-size-fits-all' sort of thing; Pentium Pro right up to P4! So installing it may not make your machine or code run faster, just more reliably! :)

But does anyone remember how slow Intel was to admit that there was a problem with the math in some versions of the Pentium Pro? (Thats the fdiv_bug referenced in code in some of the previous posts)

See also:
http://www.techweb.com/wire/news/1997/11/1110intpent.html
Page32
Intel Microcode Update Utility for Linux
Seems rather odd to me, keeping something you mean to be taken seriously on a website called "UrbanMyth.org". :D
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Mark Clegg
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PostPosted: Sat Sep 17, 2005 3:58 pm    Post subject: Reply with quote

On my Toshiba Satellite 1900/305 - P4 2.4GHz

IA-32 Microcode Update Driver: v1.14 <tigran@veritas.com>
microcode: CPU0 updated from revision 0x24 to 0x37, date = 06042003
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PostPosted: Wed Sep 21, 2005 10:11 am    Post subject: Reply with quote

Code:
microcode: CPU0 already at revision 0x12 (current=0x12)
microcode: No new microcode data for CPU0
Code:

processor       : 0
vendor_id       : GenuineIntel
cpu family      : 15
model           : 4
model name      : Intel(R) Pentium(R) 4 CPU 3.00GHz
stepping        : 1
cpu MHz         : 3008.929
cache size      : 1024 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 5
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor ds_cpl cid xtpr
bogomips        : 6019.04
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Mimamau
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PostPosted: Wed Sep 21, 2005 1:47 pm    Post subject: Reply with quote

Code:
microcode: CPU0 already at revision 0xc (current=0xc)
microcode: No new microcode data for CPU0

Code:
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 8
model name      : Pentium III (Coppermine)
stepping        : 6
cpu MHz         : 696.979
cache size      : 256 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr sse
bogomips        : 1376.25
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voidengineer
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PostPosted: Fri Sep 23, 2005 10:25 pm    Post subject: a brief explaination of a microcode update Reply with quote

Microcode is something that is generally used in CISC designes to tell a processor exactly how to execute an instruction, which may or may not take more than one clock cycle to achieve the desired results. For example the complexity of a multiplication instruction is controlled by the microcode which controls the ALU (arithmatic logic unit). In a way the microcode behaves like the code you might use to control a FPGA (field programmable gate array) in order to get the gates (logical building blocks) to work in a certain way to achieve a desired result.

RISC systems, on the other hand, seek to improve performance by reducing the number of clock cycles required to perform tasks. They have small sets of simplified instructions, doing away with microcode altogether in most cases. While this means that tasks require more instructions, instructions are all of the same length and usually require only one clock cycle to complete. Because of this, RISC systems are capable of processing instructions in parallel in a process called pipelining. The CPU works on more than one instruction at once by starting the second instruction before it completes the first one. This greatly increases throughput and makes RISC systems substantially faster than their CISC counterparts.

Anyways this is by no means the end all and be all of microcode, but perhaps it might shine a light on the subject.
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PostPosted: Sat Sep 24, 2005 5:12 pm    Post subject: Reply with quote

consider this a calculated but totally unproved guess: Would Apple's switch to Intel processors have anything to do with it?
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Dlareh
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PostPosted: Sat Sep 24, 2005 5:23 pm    Post subject: Reply with quote

pjv wrote:
consider this a calculated but totally unproved guess: Would Apple's switch to Intel processors have anything to do with it?

nyet, zero, zilch, nada, wouldn't make any sense whatsoever
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PostPosted: Sat Sep 24, 2005 7:46 pm    Post subject: Reply with quote

Quote:
microcode: CPU0 updated from revision 0xb to 0xc, date = 04212005
Shweet.
Code:
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 15
model           : 3
model name      : Intel(R) Pentium(R) 4 CPU 2.40GHz
stepping        : 3
cpu MHz         : 2412.308
cache size      : 1024 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 5
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor ds_cpl cid
bogomips        : 4830.78

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PostPosted: Sat Sep 24, 2005 10:19 pm    Post subject: Reply with quote

EDIT: Seems I spoke too soon about the PentiumPro being dumped, although there's no difference between the microcode.dat that comes with portage and the recently released one:

With "old" microcode.dat
Code:

microcode: CPU1 updated from revision 0xd1 to 0xd2, date = 02181998
microcode: CPU0 updated from revision 0xd1 to 0xd2, date = 02181998

With "new" microcode.dat
Code:

microcode: CPU0 already at revision 0xd2 (current=0xd2)
microcode: CPU1 already at revision 0xd2 (current=0xd2)
microcode: No new microcode data for CPU1
microcode: No new microcode data for CPU0


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PostPosted: Thu Oct 06, 2005 12:46 am    Post subject: Reply with quote

4x Pentium Pro 200MHz
Code:
microcode: CPU0 already at revision 0xc6 (current=0xc6)
microcode: CPU1 already at revision 0xc6 (current=0xc6)
microcode: CPU3 already at revision 0xc6 (current=0xc6)
microcode: No new microcode data for CPU3
microcode: No new microcode data for CPU0
microcode: CPU2 updated from revision 0xd1 to 0xd2, date = 02181998
microcode: No new microcode data for CPU1

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