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Creating a netboot and use crossdev for a sgi octane
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nuts
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PostPosted: Sat Nov 06, 2010 9:04 am    Post subject: Creating a netboot and use crossdev for a sgi octane Reply with quote

Hi, (sorry I speak english a little)

I want to install Gentoo on my SGI Octane (ip30, mips R10000) but the netboots on mirrors are obsolete. I think I can use my pc with amd phenom2 to create a netboot and compile bases from stage1 (because stage3 for mips is too old) for the octane.
After installation I'll need distcc to help the octane by my pc.

How to set up all?
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nuts
PC: AMD Phenom 2 bi-core 555 + Asus M4A77T/USB3 + 2Go de RAM + wifi Ralink RT61 + Radeon HD 3450 - Disque dur 500Go.
SGI Octane ip30 R10000
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mattst88
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PostPosted: Sat Nov 06, 2010 6:05 pm    Post subject: Reply with quote

Octane support in Linux (in general, not only Gentoo) is broken. :\

I'm going to have some N32 stages created in December, so they might help you.
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nuts
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PostPosted: Sat Nov 06, 2010 6:08 pm    Post subject: Reply with quote

damned. Will the octane be supported in the future? or the better choice is waiting OpenBSD
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mattst88
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PostPosted: Sun Nov 07, 2010 8:37 pm    Post subject: Reply with quote

The guy who wrote all the Octane-support code isn't interested in maintaining it or moving it upstream.

I'm sure someone, someday, will get Octane support in usable shape, but I don't have any idea who or when.
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Kumba
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PostPosted: Mon Mar 14, 2011 10:17 am    Post subject: Reply with quote

nuts wrote:
damned. Will the octane be supported in the future? or the better choice is waiting OpenBSD

At some point. I'm currently teaching myself kernel hacking, albeit slowly, by re-writing a driver for the Dallas/Maxim DS-1687-5 chip found in both the O2 and Octane.

Once I know this chip works 100% in O2, then it's going to be my debugging buddy when I tackle Octane, because I have to make sure the IOC3 bits work correctly. IOC3 is a "PCI" device that tries to violate the PCI spec as much as possible. It acts as a multi-function interface for peripheral devices on Octane -- ethernet, RTC (the DS1687-5), keyboard, mouse, serial, SuperIO, and the Dallas "Number-In-a-Can" (NIC). Outside of SCSI and sound, that's pretty much most of the usable components that won't work if IOC3 won't work.

This same chip is found in Origin 200/2000 (IP27), Origin 300 (IP35), Fuel (IP35/IP45), and possibly on Tezro's IO9 board (IP35/IP53). So making it work is a step towards hopefully (and I say that with an entire salt-shaker of salt) making these systems work one day (except IP27, which works).

Last time I booted Octane was 2.6.32, and I managed to get SMP working somehow. But my IRQ handling is bad, and the kernel promptly deadlocks when the serial console gets used in userland (it works great while the kernel boots). I still have that code around that needs forward porting to a more recent kernel. Likely, I won't touch the code until 2.6.39 at the earliest.
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ddc
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PostPosted: Thu Apr 14, 2011 8:33 am    Post subject: Reply with quote

DS-1687-5 ?
it is a real time clock + novRam (in where to put the firmware settings): is it really so hard to write a kernel module to read a linear memory ?
(i think i have not understood the problem)




my Indy(5K), Impact(R10K), Octane2 (R12K), are running
- linux kernel (vanilla + mips patch) 2.6.19
- rootfs gentoo updated to 2008


no need to update that system since then (dunno about how stable is a modern portage/stage)
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Kumba
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PostPosted: Fri Apr 29, 2011 8:53 pm    Post subject: Reply with quote

ddc wrote:
DS-1687-5 ?
it is a real time clock + novRam (in where to put the firmware settings): is it really so hard to write a kernel module to read a linear memory ?
(i think i have not understood the problem)


IP32 actually stores NVRAM in an onboard flash chip that is independent of the RTC. This chip is actually soldered to the system board underneath of the RTC chip plug for some reason. Uncertain about IP30. It was tough to write the driver -- it's the first kernel driver I have ever written. I didn't even fully write it, but substantially rebuilt it from an earlier patch I found on Google back in 2009. This is to teach me about kernel work in general, which I am finding very useful as I tackle Octane. I am currently trying to get SMP working again, but am having a hard time understanding how Octane's central chip, HEART, does IRQ management so I can write code to put IRQs on different CPUs and get everything to play nicely.
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