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Does anyone know of a utility that can scan and report on the type of memory installed (DDR, SDRAM, memory speed etc)? I've got a couple of machines I want to upgrade and trying to avoid the hassle of opening them up first
Last edited by phil_r on Tue May 06, 2008 12:58 pm, edited 1 time in total.
Just when you think you know the answers, I change the questions.
i believe the windows software cpuz has such capabilities, but i don't know any linux app or library for that.
but when you know the chipset of the mainboard (lspci) you can at least "guess" the type of memory.
You could install lm-sensors and use the eeprom module through i2c/smbus to read your DIMM data with decode-dimms.pl . It's not always accurate and depends on your motherboard hooked up properly but it's a start.
Intel Core i7 2700K/Radeon Firepro W2100/24GB DDR3/800GB SSD What am I supposed watching?
Plants are pithy, brooks tend to babble--I'm content to lie between them.
Super-short f.g.o checklist: Search first, strip comments, mark solved, help others.
Now compare with decode-dimms:
Memory Serial Presence Detect Decoder
By Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner,
Jean Delvare, Trent Piepho and others
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0050
Guessing DIMM is in bank 1
SPD EEPROM Information
EEPROM Checksum of bytes 0-62 OK (0x37)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
Memory Characteristics
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 4 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-5-5-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 2.50 ns
Maximum Access Time at CAS 5 0.40 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns
Timing Parameters
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 12.50 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 12.50 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 57.50 ns
Minimum Recovery Delay (tRFC) 105.00 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
Manufacturing Information
Manufacturer AENEON
Manufacturing Location Code E
Part Number AET760UD00-25DB97X
Revision Code 0x0100
Manufacturing Date 2007-W20
Assembly Serial Number 0x01023620
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0051
Guessing DIMM is in bank 2
SPD EEPROM Information
EEPROM Checksum of bytes 0-62 OK (0x37)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
Memory Characteristics
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 4 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-5-5-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 2.50 ns
Maximum Access Time at CAS 5 0.40 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns
Timing Parameters
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 12.50 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 12.50 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 57.50 ns
Minimum Recovery Delay (tRFC) 105.00 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
Manufacturing Information
Manufacturer AENEON
Manufacturing Location Code E
Part Number AET760UD00-25DB97X
Revision Code 0x0100
Manufacturing Date 2007-W20
Assembly Serial Number 0x030232F8
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0052
Guessing DIMM is in bank 3
SPD EEPROM Information
EEPROM Checksum of bytes 0-62 OK (0x37)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
Memory Characteristics
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 4 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-5-5-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 2.50 ns
Maximum Access Time at CAS 5 0.40 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns
Timing Parameters
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 12.50 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 12.50 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 57.50 ns
Minimum Recovery Delay (tRFC) 105.00 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
Manufacturing Information
Manufacturer AENEON
Manufacturing Location Code E
Part Number AET760UD00-25DB97X
Revision Code 0x0100
Manufacturing Date 2007-W26
Assembly Serial Number 0x050A127B
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0053
Guessing DIMM is in bank 4
SPD EEPROM Information
EEPROM Checksum of bytes 0-62 OK (0x37)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
Memory Characteristics
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 4 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-5-5-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 2.50 ns
Maximum Access Time at CAS 5 0.40 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns
Timing Parameters
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 12.50 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 12.50 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 57.50 ns
Minimum Recovery Delay (tRFC) 105.00 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
Manufacturing Information
Manufacturer AENEON
Manufacturing Location Code E
Part Number AET760UD00-25DB97X
Revision Code 0x0100
Manufacturing Date 2007-W24
Assembly Serial Number 0x02051FC0
Number of SDRAM DIMMs detected and decoded: 4
Study finds stunning lack of racial, gender, and economic diversity among middle-class white males
*-memory
description: System memory
physical id: 1
size: 1012MiB
I have to use decode-dimms.pl to tell that I have two 512MB DDR DIMMs in this machine. However it can't tell that the board being capable to use either SDR xor DDR DIMMs.
Intel Core i7 2700K/Radeon Firepro W2100/24GB DDR3/800GB SSD What am I supposed watching?
Now compare with decode-dimms:
...
Module Height 30.0 mm
Bah, what utter rubbish, it doesn't even report the color of the ID label.
(Very cool tool.)
Plants are pithy, brooks tend to babble--I'm content to lie between them.
Super-short f.g.o checklist: Search first, strip comments, mark solved, help others.
Thanks guys, some useful apps there. Hadn't thought of lm-sensors (always good for a backup I suppose) and I'll give the other apps a shot and see what happens. Thanks a lot!
Just when you think you know the answers, I change the questions.