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eqlb
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Joined: 19 May 2005
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PostPosted: Thu May 19, 2005 5:51 am    Post subject: Reply with quote

is this good or not :wink:
Code:
CFLAGS="-O3  -march=athlon-xp -fforce-addr  -mfpmath=sse -momit-leaf-frame-pointer -fomit-frame-pointer -ftracer -pipe
-fweb -frerun-cse-after-loop -frerun-loop-opt -falign-functions=4 -maccumulate-outgoing-args -ffast-math
-fprefetch-loop-arrays"
CXXFLAGS="${CFLAGS} -fvisibility-inlines-hidden"
LDFLAGS="-Wl,-z,now"


Some what of a newbie and i saw that posted around some where and wondering if i should try it or is there something wrong with
it? And what does -fweb do any ways?

Yes i know read the man pages, they be confusing heheh
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moocha
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PostPosted: Thu May 19, 2005 5:58 am    Post subject: Reply with quote

eqlb wrote:
is this good or not :wink:
Code:
CFLAGS="-O3  -march=athlon-xp -fforce-addr  -mfpmath=sse -momit-leaf-frame-pointer -fomit-frame-pointer -ftracer -pipe
-fweb -frerun-cse-after-loop -frerun-loop-opt -falign-functions=4 -maccumulate-outgoing-args -ffast-math
-fprefetch-loop-arrays"
CXXFLAGS="${CFLAGS} -fvisibility-inlines-hidden"
LDFLAGS="-Wl,-z,now"


Some what of a newbie and i saw that posted around some where and wondering if i should try it or is there something wrong with
it? And what does -fweb do any ways?

Yes i know read the man pages, they be confusing heheh
Nononononono. Not good. Please read this entire thread in order to see why: https://forums.gentoo.org/viewtopic-t-318191.html And I mean really read it. My recommendations for an Athlon XP system are in this post on that thread: https://forums.gentoo.org/viewtopic-p-2314776.html#2314776

-fweb theoretically improves the operation of GCC's register allocator. In practice it doesn't make any measurable difference on x86 systems but it increases compile time, so it's pointless.
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rhill
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PostPosted: Thu May 19, 2005 6:11 am    Post subject: Reply with quote

-fweb is also broken in gcc 4.0 so might as well break the habit now. =P
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moocha
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PostPosted: Thu May 19, 2005 6:12 am    Post subject: Reply with quote

dirtyepic: Turns out that requesting a sticky on that thread, like you suggested, wouldn't have been such a bad idea after all :D.
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eqlb
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PostPosted: Thu May 19, 2005 2:12 pm    Post subject: Reply with quote

like i said i am some what new to gentoo, i can see why i doesnt work.Good thing i didnt use it yet and compiled my systems
with sane cflags. Its intersting though that people decided to use something that will bork or be as useless as a solar paneled flash light. The good thing is that gentoo is good for test bedding insane thoughts 8)
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bedazzled
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PostPosted: Mon May 23, 2005 11:27 am    Post subject: Reply with quote

What cflags do you recommend for Athlon 64 +3000 Winchester (for the 32bit distro version)?
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moocha
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PostPosted: Mon May 23, 2005 11:31 am    Post subject: Reply with quote

I recommend the exact same flags for any desktop system - just change -march to match your CPU architecture. -march=k8 in this case.
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nxsty
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PostPosted: Mon May 23, 2005 2:08 pm    Post subject: Reply with quote

moocha wrote:
I recommend the exact same flags for any desktop system - just change -march to match your CPU architecture. -march=k8 in this case.


Only if you use gcc 3.4 from unstable. Gcc 3.3, the default on 32 bit, doesn't have a k8 march flag so in that case you should use -march=athlon-xp.
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Gherald
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PostPosted: Mon May 23, 2005 2:16 pm    Post subject: Reply with quote

nxsty wrote:
Only if you use gcc 3.4 from unstable. Gcc 3.3, the default on 32 bit, doesn't have a k8 march flag so in that case you should use -march=athlon-xp.

Hmm, it seems you are right.

But I could have sworn I used -march=k8 with a gcc 3.3.x on a 64-bit installation... (3.4.0 was still hard masked at the time)
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d4n1el
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PostPosted: Wed Jun 01, 2005 8:52 am    Post subject: Reply with quote

hi!
im going to help a friend to install gentoo, and has got this computer:
1.5Ghz pentium Mobile, 1Gb RAM, Radeon 7500 32Mb

Have do you think a stable and fast configuration would look like?
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Dr.Dran
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PostPosted: Sat Jun 04, 2005 9:55 pm    Post subject: Reply with quote

TROUBLED.....:roll:

Code:

 `-O' also turns on `-fomit-frame-pointer' on machines where doing so does not interfere with debugging.


I take that word from the man ggc (versiona 3.3.5) and I'm a little in trouble, because I think that enable -fomit-frame-pointer in the CFLAGS is not necessary if that option is turned on by -O, -O2, -O3, -Os options... Someone cangive me an answer? 8O
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PostPosted: Sat Jun 04, 2005 10:46 pm    Post subject: Reply with quote

DranXXX wrote:
TROUBLED.....:roll:

Code:

 `-O' also turns on `-fomit-frame-pointer' on machines where doing so does not interfere with debugging.


I take that word from the man ggc (versiona 3.3.5) and I'm a little in trouble, because I think that enable -fomit-frame-pointer in the CFLAGS is not necessary if that option is turned on by -O, -O2, -O3, -Os options... Someone cangive me an answer? 8O
Notice the "where doing so does not interfere with debugging"? part :wink: "-fomit-frame-pointer" hurts debugging on x86 so it's not automatically enabled. If you're not doing debugging though it's perfectly safe to use.
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Last edited by codergeek42 on Mon Jun 06, 2005 7:39 pm; edited 1 time in total
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effloresce
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PostPosted: Mon Jun 06, 2005 7:33 pm    Post subject: Reply with quote

These have been my cflags for a long time now, and I haven't had any trouble.

Code:

CFLAGS="-O2 -march=pentium4 -fomit-frame-pointer -fprefetch-loop-arrays -ftracer -pipe"


Would I get a noticable speed increase changing to -O3? I recompiled with -O2 because of kde, but now I've moved to openbox.

I'm on a 2.6 ghz Dell Dimension 8300.

[currently recompiling system]
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moocha
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PostPosted: Tue Jun 07, 2005 5:55 am    Post subject: Reply with quote

effloresce wrote:
Would I get a noticable speed increase changing to -O3?
Nah.
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Crocodil
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PostPosted: Mon Jun 13, 2005 4:22 pm    Post subject: Reply with quote

Hi :)

I own a computer based on AMD64 Venice and I have 32-bit Gentoo (I've tried 64-bit but it's too problematic for me at the moment) compiled with GCC 3.4.4 using theese flags:
Quote:
CFLAGS="-march=k8 -O2 -msse3 -mfpmath=sse -ftracer -fomit-frame-pointer -pipe"
CXXFLAGS="-march=k8 -O2 -msse3 -mfpmath=sse -ftracer -fomit-frame-pointer -pipe"
LDFLAGS="-Wl,-O1"


They're based on much reading of Gentoo's documentation and forums. I care for speed but not at the cost of stability. My question are:
1) Do you believe they're all right?
2) Maybe there's something obvious missing?
3) I'm not sure if -mfpmath=sse and -fomit-frame-pointer are implied by -march=k8... (if so I will remove them).
4) Is there something I ought to change when I decide to give 64-bit another try?

I hope this thread is the right place to ask such questions :)

Best regards,
Crocodil
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nxsty
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PostPosted: Mon Jun 13, 2005 5:40 pm    Post subject: Reply with quote

Crocodil wrote:
Hi :)

I own a computer based on AMD64 Venice and I have 32-bit Gentoo (I've tried 64-bit but it's too problematic for me at the moment) compiled with GCC 3.4.4 using theese flags:
Quote:
CFLAGS="-march=k8 -O2 -msse3 -mfpmath=sse -ftracer -fomit-frame-pointer -pipe"
CXXFLAGS="-march=k8 -O2 -msse3 -mfpmath=sse -ftracer -fomit-frame-pointer -pipe"
LDFLAGS="-Wl,-O1"


They're based on much reading of Gentoo's documentation and forums. I care for speed but not at the cost of stability. My question are:
1) Do you believe they're all right?
2) Maybe there's something obvious missing?
3) I'm not sure if -mfpmath=sse and -fomit-frame-pointer are implied by -march=k8... (if so I will remove them).
4) Is there something I ought to change when I decide to give 64-bit another try?

I hope this thread is the right place to ask such questions :)

Best regards,
Crocodil


1: I wouldn't use -ftracer because it bloats code a bit or -mfpmath=sse because it usually makes code slower on 32bit. And are you sure that your CPU has sse3 support? Only the recently released bleeding edge amd64s have it.

2. Probably not.

3. None of those are implied by -march. However -fomit-frame-pointer is implied by -O2 and -mfpmath=sse is on by default on 64bit systems, but not on 32.

4. You could remove -mfpmath=sse. -fomit-frame-pointer enables extra optimizations in glibc so you should keep it even though it's turned on by -O2 on x86_64.
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Crocodil
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PostPosted: Mon Jun 13, 2005 6:07 pm    Post subject: Reply with quote

Hi :)

Thank you very much for your answer.

nxsty wrote:

1. And are you sure that your CPU has sse3 support? Only the recently released bleeding edge amd64s have it.

Yes, I'm sure of that. My processor is new (bought last week) but certainly not bleeding-edge (it's only 3000+). But seriously - all AMD64 processors with Venice core have SSE3 and I own one :)

nxsty wrote:

3. None of those are implied by -march.

:oops: My bad... I wanted to ask if it's implied by -O2 :oops: Thanks though for make it very clear.

Choosing good CFLAGS is not an easy task :? I will consider you suggestions.

Regards,
Crocodil
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Dr.Dran
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PostPosted: Mon Jun 27, 2005 2:46 pm    Post subject: Reply with quote

Quote:
Notice the "where doing so does not interfere with debugging"? part :wink: "-fomit-frame-pointer" hurts debugging on x86 so it's not automatically enabled. If you're not doing debugging though it's perfectly safe to use.


Excuse me for all the gentooers, where I can find the documentation tha explai that?

Thanx :D

P.S: I assume that the answer is true and I use the -fomit-frame-pointer, but I'm interested to study the argument for my personal interests, because I want to improve my knowledge on the gcc :D
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horton30
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PostPosted: Tue Jun 28, 2005 1:37 am    Post subject: Reply with quote

How did you get -march=K8 to work?
I tried using -march=athlon64 (whcih i think are the same)...and I got errors saying C compiler cannot create executables. I am trying to do the same thing that you did by using an amd64 but only in 32-bit (to avoid other problems). I used the stage1-x86...which may have been my problem because maybe it has gcc 3.3 or something and only gcc 3.4 has athlon64 support? IS this true? What other advice could you give me or what else did you do to get this working.

I was thinking about after it is done building everything (which it is doing right now) with -march=athlon-xp. Then I was going to try to emerge gcc 3.4 and then switch my CFLAGS and try again. WOuld this work?

Thanks!
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PostPosted: Wed Jun 29, 2005 5:29 am    Post subject: Reply with quote

Quote:
and I got errors saying C compiler cannot create executables.

you have typos in your cflags.
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augury
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PostPosted: Wed Jun 29, 2005 6:05 am    Post subject: Reply with quote

DranXXX wrote:
Quote:
Notice the "where doing so does not interfere with debugging"? part :wink: "-fomit-frame-pointer" hurts debugging on x86 so it's not automatically enabled. If you're not doing debugging though it's perfectly safe to use.


Excuse me for all the gentooers, where I can find the documentation tha explai that?

Thanx :D

P.S: I assume that the answer is true and I use the -fomit-frame-pointer, but I'm interested to study the argument for my personal interests, because I want to improve my knowledge on the gcc :D


in the gcc source code. the fomit-frame-pointer logic is in gcc/opts.c.
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Dr.Dran
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PostPosted: Wed Jun 29, 2005 3:51 pm    Post subject: Reply with quote

augury wrote:
in the gcc source code. the fomit-frame-pointer logic is in gcc/opts.c.


Sobh, I didn't find that file, I find the file gcc/c-opts.c but I didn't find any information, probably I have found the wrong file :P
May you help me more, and indicate the string or the correct file? Ehm, I'm watching the gcc-3.3.5 sources :wink:

Thanx :D
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nxsty
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PostPosted: Wed Jun 29, 2005 5:05 pm    Post subject: Reply with quote

horton30 wrote:
How did you get -march=K8 to work?
I tried using -march=athlon64 (whcih i think are the same)...and I got errors saying C compiler cannot create executables. I am trying to do the same thing that you did by using an amd64 but only in 32-bit (to avoid other problems). I used the stage1-x86...which may have been my problem because maybe it has gcc 3.3 or something and only gcc 3.4 has athlon64 support? IS this true? What other advice could you give me or what else did you do to get this working.


That's correct, only gcc 3.4 and newer supports -march=athlon64.
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k63plus_dude
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PostPosted: Wed Jun 29, 2005 9:33 pm    Post subject: K6-III+ CFLAGS Reply with quote

Architecture question about the mobile k6-iii+ processor:


So far from RTM and RTF (reading the manpages and reading the forum) I've
discovered that an march=k6-3 flag is the appropriate setting as far as gcc is
concerned. In addition it appears that I could specify -mmmx and -m3dnow
without any concerns. But after reading the gcc manual and checking the
functions enable by these flags against the hardware specs from AMD, I noticed
that the plus series (k6-x model D chips) enable all the additional mmx
functions and 3dnow extended functions found on an Athlon processor.
Unfortunately the gcc man page says that these functions are enabled only
with a combination of -march=athlon and -mmmx -m3dnow. Using -march=
athlon seems to also throw in -msse which I don't have on this chip.

quote from gcc manual:

Quote:

The following built-in functions are made available by -mmmx. All of them generate the machine instruction that is part of the name.

v8qi __builtin_ia32_paddb (v8qi, v8qi)
v4hi __builtin_ia32_paddw (v4hi, v4hi)
v2si __builtin_ia32_paddd (v2si, v2si)
v8qi __builtin_ia32_psubb (v8qi, v8qi)
v4hi __builtin_ia32_psubw (v4hi, v4hi)
v2si __builtin_ia32_psubd (v2si, v2si)
v8qi __builtin_ia32_paddsb (v8qi, v8qi)
v4hi __builtin_ia32_paddsw (v4hi, v4hi)
v8qi __builtin_ia32_psubsb (v8qi, v8qi)
v4hi __builtin_ia32_psubsw (v4hi, v4hi)
v8qi __builtin_ia32_paddusb (v8qi, v8qi)
v4hi __builtin_ia32_paddusw (v4hi, v4hi)
v8qi __builtin_ia32_psubusb (v8qi, v8qi)
v4hi __builtin_ia32_psubusw (v4hi, v4hi)
v4hi __builtin_ia32_pmullw (v4hi, v4hi)
v4hi __builtin_ia32_pmulhw (v4hi, v4hi)
di __builtin_ia32_pand (di, di)
di __builtin_ia32_pandn (di,di)
di __builtin_ia32_por (di, di)
di __builtin_ia32_pxor (di, di)
v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi)
v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi)
v2si __builtin_ia32_pcmpeqd (v2si, v2si)
v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi)
v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi)
v2si __builtin_ia32_pcmpgtd (v2si, v2si)
v8qi __builtin_ia32_punpckhbw (v8qi, v8qi)
v4hi __builtin_ia32_punpckhwd (v4hi, v4hi)
v2si __builtin_ia32_punpckhdq (v2si, v2si)
v8qi __builtin_ia32_punpcklbw (v8qi, v8qi)
v4hi __builtin_ia32_punpcklwd (v4hi, v4hi)
v2si __builtin_ia32_punpckldq (v2si, v2si)
v8qi __builtin_ia32_packsswb (v4hi, v4hi)
v4hi __builtin_ia32_packssdw (v2si, v2si)
v8qi __builtin_ia32_packuswb (v4hi, v4hi)

The following built-in functions are made available either with -msse, or with a combination of -m3dnow and -march=athlon. All of them generate the machine instruction that is part of the name.

v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
v8qi __builtin_ia32_pavgb (v8qi, v8qi)
v4hi __builtin_ia32_pavgw (v4hi, v4hi)
v4hi __builtin_ia32_psadbw (v8qi, v8qi)
v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
v8qi __builtin_ia32_pminub (v8qi, v8qi)
v4hi __builtin_ia32_pminsw (v4hi, v4hi)
int __builtin_ia32_pextrw (v4hi, int)
v4hi __builtin_ia32_pinsrw (v4hi, int, int)
int __builtin_ia32_pmovmskb (v8qi)
void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
void __builtin_ia32_movntq (di *, di)
void __builtin_ia32_sfence (void)

and ....

The following built-in functions are available when -m3dnow is used. All of them generate the machine instruction that is part of the name.

void __builtin_ia32_femms (void)
v8qi __builtin_ia32_pavgusb (v8qi, v8qi)
v2si __builtin_ia32_pf2id (v2sf)
v2sf __builtin_ia32_pfacc (v2sf, v2sf)
v2sf __builtin_ia32_pfadd (v2sf, v2sf)
v2si __builtin_ia32_pfcmpeq (v2sf, v2sf)
v2si __builtin_ia32_pfcmpge (v2sf, v2sf)
v2si __builtin_ia32_pfcmpgt (v2sf, v2sf)
v2sf __builtin_ia32_pfmax (v2sf, v2sf)
v2sf __builtin_ia32_pfmin (v2sf, v2sf)
v2sf __builtin_ia32_pfmul (v2sf, v2sf)
v2sf __builtin_ia32_pfrcp (v2sf)
v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf)
v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf)
v2sf __builtin_ia32_pfrsqrt (v2sf)
v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf)
v2sf __builtin_ia32_pfsub (v2sf, v2sf)
v2sf __builtin_ia32_pfsubr (v2sf, v2sf)
v2sf __builtin_ia32_pi2fd (v2si)
v4hi __builtin_ia32_pmulhrw (v4hi, v4hi)

The following built-in functions are available when both -m3dnow and -march=athlon are used. All of them generate the machine instruction that is part of the name.

v2si __builtin_ia32_pf2iw (v2sf)
v2sf __builtin_ia32_pfnacc (v2sf, v2sf)
v2sf __builtin_ia32_pfpnacc (v2sf, v2sf)
v2sf __builtin_ia32_pi2fw (v2si)
v2sf __builtin_ia32_pswapdsf (v2sf)
v2si __builtin_ia32_pswapdsi (v2si)



And from AMD reference 23535 AMD k6-iii+ instruction support section:
Quote:

This section documents all of the x86 instructions supported by
the Mobile AMD-K6-III+ processor. The following tables show
the instruction mnemonic, opcode, modR/M byte, decode type,
and RISC86 operation(s) for each instruction. Tables 12 through
16 define the integer, floating-point, MMX, 3DNow!
instructions, and 3DNow! technology DSP extensions for the
Mobile AMD-K6-III+ processor, respectively. For details about
the MMX, 3DNow! instructions, and 3DNow! technology DSP
extensions refer to the following manuals:
n MMX—AMD-K6® MMX™ Processor Multimedia Extensions
Manual, order# 20726
n 3DNow!—3DNow!™ Technology Manual, order# 21928
n 3DNow! technology DSP extensions—AMD Extensions to the
3DNow!™ and MMX™ Instruction Set Manual, order# 22466


And from the 22466 reference AMD technical documentation:

Quote:

Table 1. 3DNow!™ Technology DSP Extensions
Operation Function Opcode / imm8
PF2IW Packed Floating-Point to Integer Word Conversion with Sign Extend 0Fh 0Fh / 1Ch
PFNACC Packed Floating-Point Negative Accumulate 0Fh 0Fh / 8Ah
PFPNACC Packed Floating-Point Mixed Positive-Negative Accumulate 0Fh 0Fh / 8Eh
PI2FW Packed Integer Word to Floating-Point Conversion 0Fh 0Fh / 0Ch
PSWAPD Packed Swap Doubleword 0Fh 0Fh / BBh

Table 2. MMX™ Instruction Set Extensions
Operation Function Opcode / imm8
MASKMOVQ Streaming (Cache Bypass) Store Using Byte Mask 0Fh F7h
MOVNTQ Streaming (Cache Bypass) Store 0Fh E7h
PAVGB Packed Average of Unsigned Byte 0Fh E0h
PAVGW Packed Average of Unsigned Word 0Fh E3h
PEXTRW Extract Word into Integer Register 0Fh C5h
PINSRW Insert Word from Integer Register 0Fh C4h
PMAXSW Packed Maximum Signed Word 0Fh EEh
PMAXUB Packed Maximum Unsigned Byte 0Fh DEh
PMINSW Packed Minimum Signed Word 0Fh EAh
PMINUB Packed Minimum Unsigned Byte 0Fh DAh
PMOVMSKB Move Byte Mask to Integer Register 0Fh D7h
PMULHUW Packed Multiply High Unsigned Word 0Fh E4h
PREFETCHNTA Move Data Closer to the Processor Using the NTA Reference 0Fh 18h 0*
PREFETCHT0 Move Data Closer to the Processor Using the T0 Reference 0Fh 18h 1*
PREFETCHT1 Move Data Closer to the Processor Using the T1 Reference 0Fh 18h 2*
PREFETCHT2 Move Data Closer to the Processor Using the T2 Reference 0Fh 18h 3*
PSADBW Packed Sum of Absolute Byte Differences 0Fh F6h
PSHUFW Packed Shuffle Word 0Fh 70h
SFENCE Store Fence 0Fh AEh / 7h
Note:
* The number after the opcode indicates the different prefetch modes in the ModR/M byte.


As you can see, the extra functions that this chip supports are the same as the extra
functions added for Athlons. My worry is that gcc is going to ignore those extra functions
when compiling and my already poor video playback and fps rates are going to stay
as bad on gentoo as I would have had with a binary distribution. Anyone else playing
with these processors and gentoo have any advice?

Sincerely,

In search of MythTV via Gentoo.
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borism
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Joined: 24 Oct 2003
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Location: Australia

PostPosted: Thu Jun 30, 2005 7:45 am    Post subject: Reply with quote

k63plus_dude wrote:
My worry is that gcc is going to ignore those extra functions
when compiling and my already poor video playback and fps rates are going to stay
as bad on gentoo as I would have had with a binary distribution

Binary distributions are supposed to do cpu runtime autodetection to select which instructions are supported so that the application can configure itself at startup to use appropriate routines.
Your poor framerates probably have more to do with the age of your hardware than anything else.
If your chip does indeed support 3dnow+ and mmx2 exactly like athlons do I would try -march athlon and put
Code:
-sse mmx mmxext 3dnow 3dnowext

in your use flags. Ebuilds then should add -no-sse to the CFLAGS when compiling programs that use sse.
I once had "mmx2" instead of "mmxext" in my use flags and mplayer compiled without support for it. At startup it printed a message that mmx2 was supported but disabled..
Other things you could try to improve playback
    Use gcc-3.4 compiler, it optimises better. Perhaps with -mtune=k6-3
    add -ffast-math and -O3 -funroll-loops when compiling video codecs (not in make.conf!)
    If you've got an nvidia card xvmc should take some burnen off your CPU.
    use ck-sources
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