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Irre
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PostPosted: Wed Feb 07, 2018 9:44 am    Post subject: ¨0.06 KWh to emerge gcc-7.3 Reply with quote

I emerged gcc on two different architectures, and came to the conclusion that energy consumption is the same.

First on Raspberry PI first generation:

genlop -t gcc

Wed Feb 7 01:54:05 2018 >>> sys-devel/gcc-7.3.0
merge time: 1 day, 17 hours, 24 minutes and 26 seconds.


Estimated power: 2 W
Energy consumption to build sys-devel/gcc-7.3.0: (24+17+24/60)*2 Wh = 0.063 KWh


Then on Intel i7-2670QM CPU 2.20GHz:

genlop -t gcc

Wed Feb 7 10:11:07 2018 >>> sys-devel/gcc-7.3.0
merge time: 1 hour, 6 minutes and 57 seconds.


Estimated power: 50 W
Energy consumption to build sys-devel/gcc-7.3.0: (1+7/60)*50 Wh = 0.055 KWh
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PostPosted: Wed Feb 07, 2018 12:05 pm    Post subject: Re: ¨0.06 KWh to emerge gcc-7.3 Reply with quote

Irre wrote:
I emerged gcc on two different architectures, and came to the conclusion that energy consumption is the same.

...
Estimated power: 2 W
Energy consumption to build sys-devel/gcc-7.3.0: (24+17+24/60)*2 Wh = 0.063 KWh
...

Estimated power: 50 W
Energy consumption to build sys-devel/gcc-7.3.0: (1+7/60)*50 Wh = 0.055 KWh


Really? My conclusion would be that it‘s more effienct to compile on the more beefy machine...
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Irre
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PostPosted: Wed Feb 07, 2018 1:07 pm    Post subject: Reply with quote

:oops: you are right! (24+17+24/60)*2 Wh = 0.083 KWh
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PostPosted: Wed Feb 07, 2018 1:10 pm    Post subject: Reply with quote

Irre,

I think both your power estimates are low but the result is expected.

Silicon performance has long been limited by the energy density its possible to extract to keep junction temperatures within bounds, your two processors will run at the same W/m^2 of die.
It follows that a smaller die must take longer to perform the same amount of work.
This is true regardless of the feature size on the semiconductor.

To increase the energy density, either the die must be run hotter, that demands novel semiconductors. They are around, in blue LEDs.
or novel cooling to dissipate the heat better. That's around too, its just very expensive. Water cooling is not the sort of thing I had in mind but its an example.
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Irre
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PostPosted: Wed Feb 07, 2018 6:20 pm    Post subject: Reply with quote

Compiling with /var/tmp in tmpfs was much faster:

Wed Feb 7 20:00:41 2018 >>> sys-devel/gcc-7.3.0
merge time: 43 minutes and 2 seconds.

Estimated power: 50 W
Energy consumption to build sys-devel/gcc-7.3.0: (43/60)*50 Wh = 0.036 KWh
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John R. Graham
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PostPosted: Wed Feb 07, 2018 6:25 pm    Post subject: Reply with quote

There are some architectural differences that are a factor as well. The highly refined & much-iterated x86 CISC still beats any RISC, clock for clock and (usually) watt for watt.

- John
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PostPosted: Wed Feb 07, 2018 6:59 pm    Post subject: Reply with quote

<sarcasm>
Gentoo is costing us $0.01 every time they make us compile gcc-7.3, (webkit, chromium, firefox, rust, ...) and $0.02 for openoffice... there's my two cents...
</sarcasm>
:)
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PostPosted: Wed Feb 07, 2018 9:21 pm    Post subject: Reply with quote

John R. Graham,

The highly refined & much-iterated x86 CISC is actually a RISC core and has been for many years.
The CISC part is emulated by the microcode on the RISC core.
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PostPosted: Wed Feb 07, 2018 9:27 pm    Post subject: Reply with quote

NeddySeagoon wrote:
John R. Graham,

The highly refined & much-iterated x86 CISC is actually a RISC core and has been for many years.
The CISC part is emulated by the microcode on the RISC core.
++

What is microcode
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PostPosted: Wed Feb 07, 2018 9:30 pm    Post subject: Reply with quote

It's not that simple (but I know you know that). For instance, branch prediction and speculative execution, which are both part of the "highly refined" part, are not done (or not all done) in microcode, but in hardware. Now you can go ahead & tell me that these techniques are equally applicable to RISC architectures. ;)

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PostPosted: Wed Feb 07, 2018 9:59 pm    Post subject: Reply with quote

John R. Graham wrote:
It's not that simple (but I know you know that). For instance, branch prediction and speculative execution, which are both part of the "highly refined" part, are not done (or not all done) in microcode, but in hardware. Now you can go ahead & tell me that these techniques are equally applicable to RISC architectures. ;)

- John

ARM Cortex-A75
ARM Cortex-A72
ARM Cortex-A57
ARM Cortex-A15
(The RiP does not have speculative execution before the original discussion is thrown back as a counter to your broad statement... https://www.raspberrypi.org/blog/why-raspberry-pi-isnt-vulnerable-to-spectre-or-meltdown/)

please tell me these chips are CISC. Sure branch prediction and speculative execution are more advanced CPU techniques, they are not soo complex that they cannot be implemented in a RISC architecture because SHOCK HORROR they are within x86 CISC chips. These techniques are all about pipeline optimisation.
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PostPosted: Wed Feb 07, 2018 10:38 pm    Post subject: Reply with quote

I don't know why speculative execution and branch prediction give CISC so much flak wnen the Alpha by (formerly) DEC had these too...and it's RISC. These performance enhancing features are merely omitted for simplicity for many processors because solely of complexity - not due to instruction set, but to hardware to ensure correct operation, though it's even more difficult on CISC and legacy code.

I suspect the demonization is solely due to the outstanding spectre/meltdown attacks. It boils down to a tradeoff, do you want GCC to finish compiling in 1 hour or 1 day, especially if you're trying to code/debug GCC...

Or in our case, run Gentoo... because a Gentoo box spends a lot of time with the gcc process in the run queue than many other Linux machines.
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PostPosted: Wed Feb 07, 2018 10:45 pm    Post subject: Reply with quote

eccerr0r wrote:

I suspect the demonization is solely due to the outstanding spectre/meltdown attacks. It boils down to a tradeoff, do you want GCC to finish compiling in 1 hour or 1 day, especially if you're trying to code/debug GCC...
You will notice the flak is targeted at Intel even though AMD, ARM, IBM, ... are also vulnerable BECAUSE the oversight is in the concept (of Spectre).

Intel screwed up with Meltdown in what can only be described as cutting corners to gain performance AND they hacked people off with their PR response "nothing to see here" (which may have worked with FDIV and f00f) rather than a technical solution. Couple that will an untimely stock sell off and reporting the issue to the Chinese before American companies.
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PostPosted: Thu Feb 08, 2018 10:47 pm    Post subject: Reply with quote

Speaking of ramdisk, is the wattage also including disk power consumption for both machines? If including the same disk/storage consumption for both, I suspect the faster machine gets even more attractive to use.

However the faster machines do have dead weight like video cards and keyboards that don't help towards compilation, so that also may need to be accounted for.
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PostPosted: Fri Feb 09, 2018 7:31 am    Post subject: Reply with quote

eccerr0r wrote:
Speaking of ramdisk, is the wattage also including disk power consumption for both machines? If including the same disk/storage consumption for both, I suspect the faster machine gets even more attractive to use.

However the faster machines do have dead weight like video cards and keyboards that don't help towards compilation, so that also may need to be accounted for.

The faster machine (laptop) has no external connections but network cable and power. The slow was only connected to a (cold) 5V, 0.4A power supply and an external 64G usb-stick. No monitor or network. The machine was disconnected after command:
Code:
nohup emerge gcc&
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