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LaSombra
n00b
Joined: 01 Nov 2002
Posts: 30
Location: Rio de Janeiro, Brazil
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 Posted: Fri Aug 25, 2006 4:05 pm Post subject: |
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Why MAKEOPTS should be j3 since each core is HT?
It should be capable of j5, right? |
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Daemonax
Apprentice
Joined: 30 Apr 2004
Posts: 211
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| Posted: Sat Aug 26, 2006 3:28 am Post subject: |
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Are you sure they are hyperthreaded?
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LaSombra
n00b
Joined: 01 Nov 2002
Posts: 30
Location: Rio de Janeiro, Brazil
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| Posted: Sun Aug 27, 2006 1:40 pm Post subject: |
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It says so...
| Code: |
iw-note ~ # cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 14
model name : Genuine Intel(R) CPU T2500 @ 2.00GHz
stepping : 8
cpu MHz : 2001.569
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc pni monitor vmx est tm2 xtpr
bogomips : 4005.14
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 14
model name : Genuine Intel(R) CPU T2500 @ 2.00GHz
stepping : 8
cpu MHz : 2001.569
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc pni monitor vmx est tm2 xtpr
bogomips : 3999.71
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[/code] |
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Daemonax
Apprentice
Joined: 30 Apr 2004
Posts: 211
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| Posted: Sun Aug 27, 2006 3:12 pm Post subject: |
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Just checked mine and yes you're right, if 'ht' is hyper threading.
I guess if it shows up in a cat /proc/cpuinfo that ht is turned on then? Hmm, but wouldn't that meant that cat /proc/cpuinfo would show 4 cpu's?
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The God idea is growing more impersonal and nebulous in proportion as the human mind is learning to understand natural phenomena and in the degree that science progressively correlates human and social events. -- Emma Goldman |
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LaSombra
n00b
Joined: 01 Nov 2002
Posts: 30
Location: Rio de Janeiro, Brazil
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| Posted: Sun Aug 27, 2006 7:57 pm Post subject: |
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I tried to recompile my kernel to allow HT and 4 CPUs, but didn't work 
Anyone knows if it's possible? |
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fusel
n00b
Joined: 24 Apr 2006
Posts: 15
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| Posted: Tue Aug 29, 2006 10:31 am Post subject: |
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| Cure Duo (1) (Yonah) is not capable of hyperthreading, nor does it support 64bit instructions. Instead, it features 2 real cores which are "featuring" a shared cache. According to some guys, this could be useful in some situations while beeing a showstopper in others. |
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raid517
l33t
Joined: 06 Mar 2003
Posts: 946
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| Posted: Wed Nov 22, 2006 12:31 am Post subject: |
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Wait I am still confused. There seems to be a lot of very conflicting opinion here. I am in the process of setting my use flags for my core duo laptop.
Can anybody give the definitive word on what settings I really should use - and which might be optional? |
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Brendenm
n00b
Joined: 17 Jul 2002
Posts: 55
Location: Beer Capitol USA
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| Posted: Tue Dec 12, 2006 5:01 pm Post subject: No Hyperthreading |
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Hyperthreading requires more then just the processor supporting it, it requires the chipset and such to also.
I just ran the official Intel chipset, processor & hyperthreading utilities on my Dell Latitude D820 /w T2400 and it DOES NOT support HyperThreading according to Intel.
So far from another thread this is what I found for the CFLAGS
| Code: |
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
MAKEOPTS="-j3"
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My question is, what does prescott turn on? do I need to include all of the sse flags (sse, sse2, sse3), I know core2 does this? |
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Mehlano
n00b
Joined: 08 Dec 2006
Posts: 29
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| Posted: Tue Dec 12, 2006 9:06 pm Post subject: |
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Hi genties! 
So I guess, nocona is the right -march for my Pentium D 820 with a smithfield core... right?
| Code: | processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Pentium(R) D CPU 2.80GHz
stepping : 7
cpu MHz : 2810.204
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc pni monitor ds_cpl cid cx16 xtpr lahf_lm
bogomips : 5624.03
processor : 1
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Pentium(R) D CPU 2.80GHz
stepping : 7
cpu MHz : 2810.204
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc pni monitor ds_cpl cid cx16 xtpr lahf_lm
bogomips : 5620.13 |
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1x Intel Pentium Core 2 Duo E6600 @ 2.4 GHz, 2048 MB RAM, 640 MB XFX 8800 GTS, Gnome w/ Beryl 0.1.4, Kernel: 2.6.19-r5
Registered Linux User #437626 |
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bewst
n00b
Joined: 06 Jan 2007
Posts: 2
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| Posted: Sat Jan 06, 2007 2:39 pm Post subject: Still Confusing ... |
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| dirtyepic wrote: |
You're right that the Core Duo is based on the Pentium-M microarch, but it's had some major updates done to it. Fex, the SSE front and backend are completely redone. On the P-M, it took twice as long to decode SSE than X87. Core can handle up to three packed and micro-op SSE instructions at once, making using SSE the advantage. However, when you set -march=pentium-m, GCC prefers to generate x87 instructions.
There's other changes that make Core more similar to Netburst than P-M when it comes to cost calculation, prefetch block size, etc., all of which are dependent on -march. Check out gcc/config/i386/i386.c and the IA32 Intel Architecture Optimization Reference Manual. |
Someone I respect claims that P-M is still a more appropriate choice (http://jmaurer.awardspace.info/e8210/). What do you think of his argument? |
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Dirk.R.Gently
Guru
Joined: 29 Jan 2007
Posts: 546
Location: Titan
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| Posted: Wed Jun 06, 2007 10:08 am Post subject: |
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My Core Duo uses only one processor for many different tasks. Is this because of a misconfiguration, or do apps need to be programmed to use it? For example, compiling will use both processors, but this won't happen when I'm browsing with Firefox. I used prescott and my kernel is has 2 processors selected.
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Akkara
Bodhisattva
Joined: 28 Mar 2006
Posts: 6702
Location: &akkara
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| Posted: Wed Jun 06, 2007 12:27 pm Post subject: |
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| Quote: | | My Core Duo uses only one processor for many different tasks. Is this because of a misconfiguration [...] |
To use more than one core, the app must be written in a multi-threaded manner, and most simple apps aren't.
Compiling uses both cores only because the make script fires off more than one compilation at a time (that's the MAKEOPTS="-j3" option in make.conf)
GUI apps tend to use multiple threads but the division is usually a UI thread and a work thread. So you'll see some use of both cores if the UI updates while work is being done. But unless the work itself is split into two (or more) threads and they are reasonably equally balanced, only one core will be busy most of the time.
I had run into this issue also. If you have a lot of scripting-type of stuff to do consisting of independent commands working on separate files and you'd like a way to use both cores, perhaps this parallelizing shell-feeding script might be of interest. It does no dependency checking whatsoever, nor any locking or synchronization, so it is only useful if you have a long list of independent work to do. |
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Dirk.R.Gently
Guru
Joined: 29 Jan 2007
Posts: 546
Location: Titan
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| Posted: Fri Jun 08, 2007 1:26 am Post subject: |
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Much obliged, Akkara. I wonder about that.
Well I decided to try march pentium-m as suggested in the above post. It'll be months before I'll ever see any output from it as my system is pretty up to date. I did test some of the additional CFLAGS though ( -malign-double -mregparm=3 -msseregparm -m128bit-long-double ). I decided to test totem as it's been known to a little bit picky about what flags are set. With -malign-double and -mregparm=3 would emerge but totem wouldn't run. -msseregparm worked but broke sliders in gnome. So here is my current CFLAGS line.
CFLAGS="-O2 -march=pentium-m -msse3 -mfpmath=sse -m128bit-long-double -fomit-frame-pointer -pipe"
Totem is seems to work nicely.
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xevilstar
n00b
Joined: 21 Jun 2007
Posts: 13
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| Posted: Thu Jul 05, 2007 1:53 pm Post subject: core duo |
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| the core duo support is in the latest kernels as core duo |
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Master Shake
l33t
Joined: 10 Apr 2005
Posts: 755
Location: Wilmington, Delaware
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| Posted: Thu Jul 05, 2007 3:05 pm Post subject: Re: core duo |
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| xevilstar wrote: | | the core duo support is in the latest kernels as core duo |
Sure that isn't Core 2 Duo?
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System Specs:
64-bit gentoo linux
Q6600 @ 3.2Ghz
P35 Chipset
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Dirk.R.Gently
Guru
Joined: 29 Jan 2007
Posts: 546
Location: Titan
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| Posted: Sun Jul 08, 2007 3:13 am Post subject: |
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I got a brain today. I just noticed that I didn't have the "threads" USE flag in my make.conf. It doesn't change that many apps but it's nice I found out.
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minor_prophets
Apprentice
Joined: 07 Oct 2007
Posts: 281
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| Posted: Tue Feb 05, 2008 2:07 am Post subject: prescott... |
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| pactoo wrote: | | If prescottt is to prefer over pentium-m for cflags, what should I choose then for the kernel config? pentium-4 or still pentium-m? And does it make sense to also activate "check for P4 thermal throttling support" with core duo? |
I've used prescott in my make.conf and pentium m in the kernel since about the time of your post with no problems. I'm compiling my 2.6.23-r3 kernel right now with Pentium-4 as the Processor option based on dirtyepic's response to your post to take a peek at what happens.
My Family 6 Model 14 Prescott
| Code: | CFLAGS="-march=prescott -O2 -pipe"
CHOST="i686-pc-linux-gnu"
CXXFLAGS="${CFLAGS}"
MAKEOPTS="-j3"
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cognhuepan
n00b
Joined: 24 Oct 2007
Posts: 17
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| Posted: Sat Mar 01, 2008 7:15 am Post subject: |
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hey! I'm lost here, I have an Intel Centrino Duo Processor
#cat /proc/cpuinfo shows:
| Code: | processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 15
model name : Intel(R) Core(TM)2 Duo CPU T5250 @ 1.50GHz
stepping : 13
cpu MHz : 1000.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni monitor ds_cpl est tm2 ssse3 cx16 xtpr lahf_lm
bogomips : 3003.17
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 15
model name : Intel(R) Core(TM)2 Duo CPU T5250 @ 1.50GHz
stepping : 13
cpu MHz : 1000.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni monitor ds_cpl est tm2 ssse3 cx16 xtpr lahf_lm
bogomips : 2999.68
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
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But, I'm not sure what kind of architecture is mine, it's 32 or 64 bits??
'so no más
-j-
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Kernel & Hardware
