Architecture Question

[devGecko]

whats the difference between PPC and x86?

Thanks for answering!


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-- lil' grn gcko was here........

[reves]

Hello devGecko,

x86 and PPC are different types of proccessors. 386, 486, Pentium, Athalon, and Cyrix proccessors are x86 proccessors. The G3 and G4 proccessors used in Macs are PPC proccessors.

http://arstechnica.com/cpu/01q2/p4andg4e/p4andg4e-1.html
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Robert

[devGecko]

My apologies.....

It isn't very clear, in that article at Ars Technica, what the difference is between PPC and x86 architecture.

Could you possibly go over the difference with one or two brief statements?
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-- lil' grn gcko was here........

[gnoodle]

this might be an oversimplification (and doesn't take into account any processor-specific enhancements in the latest processors), but the fundamental difference between the "x86" family of processors and the "ppc" family is the instruction set architecture.

powerpc ("ppc") processors are reduced instruction set computing ("risc") processors, while x86 processors are complex instruction set computing processors ("cisc").

a detailed discussion is beyond my abilities, but i believe the "cisc" processors have a lot of functions hard-coded into the processors and are not parallel processing in nature, while "risc" processors are "simpler" with fewer functions hard-coded into the processors, but rather rely on parallel processing capabilities to increase throughput.

the end result is that cisc processors rely more heavily on clock speed to increase processing throughput, while risc processors can supposedly do more at once and therefore don't need to be as fast in order to have the same throughput per unit time. (think of a freeway as an analogy -- cisc is a single-lane highway, while risc is a multi-lane highway...for every car on the single-lane, you can have three on a triple-lane.)
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[zhenlin]

Another one is comparison of complexity of instructions.

In so-called RISC architectures, most of the instructions are simple ones like "store r0, r1" or "add r0, r1, r2".

In so-called CISC architectures, there are instructions that are very complex, like "rep stosd" (Repetively store a string by doubleword from EAX to EDI, ECX times)

But nowadays, Intel processors can be considered as CISC-emulators running on a RISC chip. (The instructions are translated into microcode and executed, instead of direct-execute like the 286s did)

If you see multilength instructions, it is almost certainly a CISC architeture. Compare, the varying length of the Intel instructions (second column):