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What does this kernel option mean (CONFIG_PCI_MSI)?
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mhodak
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PostPosted: Sat Aug 28, 2004 5:00 pm    Post subject: What does this kernel option mean (CONFIG_PCI_MSI)? Reply with quote

I am just updating my kernel (2.6.8-ck4) and came across the option I do not understand:
Message Signaled Interrupts (MSI and MSI-X)
Help text says:
Quote:

This allows device drivers to enable MSI (Message Signaled Interrupts). Message Signaled Interrupts enable a device to generate an interrupt using an inbound Memory Write on its
PCI bus instead of asserting a device IRQ pin.


I am not a big hardware expert and do not understand the help message.
So, I am wondering if this option is useful for typical PC hardware and if it improves system performance.

Anyone knows about this?

Thanks.
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NeddySeagoon
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PostPosted: Sat Aug 28, 2004 5:29 pm    Post subject: Reply with quote

mhodak,

It improves system performace on hardware that supports it. Especially in the shared IRQ environment of the PCI bus.

Some history. Originally microprocessors has at most, two interrupt lines NMI (Non Maskable Interupt) and IRQ (Interrupt Request).
NMI was only used for disasters like power loss occring and memory parity error. IRQ did everything eles.

In the XT and more so in the AT, The single processor IRQ signal was expanded by the use of one then two interrupt priority encoders. This allowed more more Interrrupts to be catered for quite effecently, since the CPU only had to read the priority encoder to determine the cause of the interrupt, then look up the number in a table to find the address of the service routine (The alternave was to poll a list of devices, which is slow in comparision)

At the same time mini and mainframe computers used a mechanisim of storing the address of the interrupt service routine on each interrupting device. The device then put this address on the bus as part of the IRQ acknowedge cycle and the CPU went straight to the service routine.

With PCI shared interrups we are back to a mix of the look up table and polling, since each device that is sharing must be polled until one of them 'owns up' as being a source of the IRQ.

The MSI mechanism is a way of having the PCI device provide the address of its interrupt service routine during the IRQ acknowedge cycle to cut out the look up table and polling.

Its a Good Thing(tm) say yes.
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mhodak
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PostPosted: Sat Aug 28, 2004 6:49 pm    Post subject: Reply with quote

Thanks for great and detailed answer.

SInce you seem to know quite a lot about things like this, here are 2 other kernel processor options that I am not sure whether tehy are useful or not:
1. /dev/cpu/*/msr - Model-specific register support
Quote:

CONFIG_X86_MSR:

This device gives privileged processes access to the x86
Model-Specific Registers (MSRs). It is a character device with
major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.MSR accesses are directed to a specific CPU on multi-processor
systems.

and 2 /dev/cpu/*/cpuid - CPU information support
Quote:

CONFIG_X86_CPUID:
This device gives processes access to the x86 CPUID instruction to be executed on a specific processor. It is a character device with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
/dev/cpu/31/cpuid.


Thanks
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NeddySeagoon
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PostPosted: Sat Aug 28, 2004 7:28 pm    Post subject: Reply with quote

mhodak,

They are both useful. The CPUID instruction is used by some programs (not so much in Gentoo) to do on they fly optimiisation.
They get compiled with different code segments for diferent CPUs and picj the fasted one at run time based on the CPUID.
However, CPUID is a priviledge instruction so user space programs may not execute it. The kernel makes the result avaibale to use space. This is what populates /proc/cpuinfo

MSRs are similar. Again they can only be manipulated with instructions than can only be executed by the kerenl. e.g. the timestamp counter is one such regester on some CPUs.
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Safrax
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PostPosted: Sat Aug 28, 2004 7:29 pm    Post subject: Reply with quote

Neddy, what hardware supports MSI? Would say my Dell Inspiron 8200 or my nforce2 based athlon xp desktop support such things?
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PostPosted: Sat Aug 28, 2004 7:41 pm    Post subject: Reply with quote

Safrax,

All motherboards do, its drivers and PCI cards that may not. If you turn it on, it will be used where possible. The system will fall back to the old ways if it has to.
It can only work with PCI devices. ISA devices have never been able to work this way. PCI devices includes things built onto the motherboard on the PCI bus, not just plugged into slots.
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mhodak
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PostPosted: Sat Aug 28, 2004 8:49 pm    Post subject: Reply with quote

Neddy,
is it OK to select MSR and CPUID as modules, will the kernel load them automatically if needed?

KMOD and hotplug are on.

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PostPosted: Sat Aug 28, 2004 9:44 pm    Post subject: Reply with quote

mhodak,

I'm not sure how devfs handles that but I suspect that if you want them as modules, yo will need to manage the loading and unloading yourself
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mhodak
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PostPosted: Sat Aug 28, 2004 10:40 pm    Post subject: Reply with quote

Ome more question: Schedules

In 2.6 kernel several schedulers are available. Is there any point in compiling all of them in, if I just want to use defualt one, I do not want to switch schedulers while my sytsem runs? I believe that default scheduler for ck kernel is CFQ, I am OK with that and do not want to switch to different one. SO basically, is there any point for me in compiling support for other schedulers?

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PostPosted: Sat Aug 28, 2004 11:05 pm    Post subject: Reply with quote

mhodak,

No point at all if you will never use them
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