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dmpogo
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Joined: 02 Sep 2004
Posts: 3266
Location: Canada
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 Posted: Wed Sep 19, 2012 9:51 pm Post subject: |
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| aCOSwt wrote: |
Out of interest what can you read concerning hpet in your system log ?
On mine : | Code: |
HPET: 4 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
hpet0: 4 comparators, 64-bit 14.318180 MHz counter
Switching to clocksource hpet |
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Exactly the same on two desktops (with low and high INT0 counts), including address and MHz, on a laptop is almost the same, but '3 timers in total' |
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dmpogo
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Posts: 3266
Location: Canada
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| Posted: Fri Sep 21, 2012 4:12 am Post subject: |
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| I am now find that large fraction of interrupts come through kworkers from ondemand governor (do_dbs_timer). Changing to perfomnce governor decreases interrupts by a factor of two - now leading being different swapper functions. |
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s4e8
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Joined: 29 Jul 2006
Posts: 311
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| Posted: Fri Sep 21, 2012 7:19 am Post subject: |
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Most INT0 timer cause by broadcast timer. In pre-SNB/Westmere age, the lapic local timer will stopped when core enterred deep sleep (>=C2 state). It need another core to take it out of sleep, that's the broadcast timer, at timer0. There's three way to deal with this problem:
1. Disable C-state.
2. CPU has arat feature, aka, non-stopping local timer.
3. Enable HPET, if hpet support MSI (Lynnfield platform). Kernel will use hpet instead lapic timer to reduce broadcast timer. |
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dmpogo
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Posts: 3266
Location: Canada
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| Posted: Fri Sep 21, 2012 3:31 pm Post subject: |
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| s4e8 wrote: | Most INT0 timer cause by broadcast timer. In pre-SNB/Westmere age, the lapic local timer will stopped when core enterred deep sleep (>=C2 state). It need another core to take it out of sleep, that's the broadcast timer, at timer0. There's three way to deal with this problem:
1. Disable C-state.
2. CPU has arat feature, aka, non-stopping local timer.
3. Enable HPET, if hpet support MSI (Lynnfield platform). Kernel will use hpet instead lapic timer to reduce broadcast timer. |
Interesting info !
There machines I play with is i7-930, which, I believe, is pre Westmere Nehalem (45 nm core), while the other two are older circa 2007-2008 core 2 duo's (one is on mobile). To some extend, if not the difference in behaviour (the oldest core2 duo show no INT0 interrupts to speak of, while the other two show continues increment in the neighbourhood of 100/s), I probably would leave it as that. |
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